Certain elevator safety code regulations (such as ANSI A17.1) require checking speed, to determine an adequately slow speed before the doors are opened at a landing and to ensure that the elevator is slowing down as it approaches a terminal landing, by means which are in addition to the normal speed measurement utilized in the operational control of the elevator. It has heretofore been common to provide both of these speed checks based upon an encoder mounted to the elevator motor shaft. In low cost systems, the encoder output frequency has typically been converted to a voltage for comparison with a predetermined voltage indicative of the maximum safe speed being checked. Analog systems have very poor system-to-system repeatability, and lose accuracy over lifetime due to component aging and the effects of working in a high noise environment. Other systems utilize digital comparison of the count produced by said frequency over a known time interval with a count indicative of the maximum safe speed being checked. Digital systems of this type may have accuracy limited to between 2% and 5%, and may typically have data latency (the delay in sensing an overspeed after it occurs) on the order of 60 milliseconds. This can be inadequate for certain applications. The data latency is due at least in part to the length of time that the actual encoder output stream is measured; for instance, if it takes a half minute to make the measurement, the result is always a half minute late from the occurrence of an excess that will show up in the measurement. By increasing the frequency or reducing the number of counts which are counted, one can reduce the latency; but increasing the frequency requires a much greater increase in the bit capacity of all of the involved hardware or software, and reducing the number of counts checked reduces the accuracy even further. It is conceivable that among various systems with which a speed checker is to work, the number of counts can vary from on the order of 100 to on the order of several thousand; for the comparator to be universal for either application, it must be able to accommodate counts in excess of 1,000 in such a case; such a comparator is therefore wasting 90% of the hardware if it is operating at on the order of 100 counts.